The invention relates to a solid-state imaging device with a CMOS sensor for example, a production method of the same, and an imaging apparatus.
Recently, for the purpose of installing a camera function in a mobile apparatus such as a mobile phone, etc., demand for making a solid-state imaging device compact is increasing.
In a solid-state imaging device such as a CMOS image sensor, etc., generally a structure is adopted in which photodiodes (PDs) are arranged at constant intervals, for example, in a square lattice to sample incident light.
Therefore, the problem is arising that with downsizing of the solid-state imaging device as described above and miniaturization of the unit pixel due to the increase in the number of pixels, the area of a PD decreases and the characteristics of the solid-state imaging device, such as the saturation signal amount, the sensitivity, etc., decreases.
In the past, to prevent such decrease in the characteristics of the solid-state imaging device, a method has been adopted in which the decrease in the area of the PD is suppressed by decreasing the area of transistors in a unit pixel. However, there is a limit in keeping the characteristics of the solid-state imaging device with the method of keeping the area of the PD by decreasing the area of the transistors.
Japanese Unexamined Patent Application Publications No. 63-100879 and No. 2004-128193 describe a CMOS image sensor in which a pixel circuit other than the PD and the charge-transfer transistor are shared by neighboring unit pixels (see, for example, page 4, FIG. 4 of JP No. 63-100879 and paragraph numbers [0019]-[0040] and FIG. 2 of JP No. 2004-128193).
In the above-described CMOS image sensor, the number of transistors and the number of wirings per a unit pixel can be decreased, and as a result, a relatively large area can be secured for the PD, so that it is possible to cope with the miniaturization of the unit pixel.